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Opella-XD for ARC

Ultra-high-speed cJTAG/JTAG Debug Probe 
Ultra-high-speed cJTAG/JTAG Debug Probe
Ashling’s Opella-XD is a powerful cJTAG/JTAGdebug probe for embedded development with Synopsys' DesignWare ARC™ configurable RISC cores.
Developed in cooperation with Synopsys, the Opella-XD probe integrates with the MetaWare Development Toolkit or GNU GDB Debuggers under Windows™ or Linux based hosts.
Opella-XD provides up to 3MB/s download speeds making it suitable for large, complex, softwareintensive projects.
Features of Opella-XD include:
  • Fast, trouble-free “plug-and-play” installation using USB 2.0 High-Speed Interface (480Mb/s)
  • Fully powered by USB interface; no external power-supply needed
  • Fine-grained adjustment of cJTAG/JTAG clock frequency from 1KHz to 100MHz
  • Auto-conditioning support provides maximum possible download speed to target with fastest cJTAG/JTAG clock frequencies
  • Hot-plug support; allows connection to a running target without resetting or halting
  • Supplied with 20-pin .1” Target Probe Assembly for Debug (TPAOP-ARC20) interface to target device or target FPGA. Optional 15-pin D-Type adapter (AD-ARC-D15) for Debug interface to target device or ARCangel board
  • Supports target operating voltages from 0.9V to 3.6V. Opella-XD detects and automatically configures for the appropriate target voltage
  • Configurable Target-Reset and Test-Port-Reset, under full user control
  • Built-in diagnostics instantly show status of Target, Debug Probe and USB link
  • Display/read/write of target system memory and peripheral registers
  • Support for all on-chip hardware breakpoints; unlimited software breakpoints
  • Run/stop control of target application including go, halt, step over, step into and step out of
  • Operates with MetaWare Development Toolkit or GNU GDB Debuggers under Windows™ or Linux based hosts
  • Support for multi-core debug (where all cores are connected to a single cJTAG/JTAG interface) as well as multi-core debug with multiple Opella-XD’s connected a single PC (where each core has a unique cJTAG/JTAG interface)
  • ARCangel™ Development Board System FPGA programming support; allows easy configuration using an Opella-XD connection between your host PC and ARCangel™
  • All EM, ARCtangent-A4, ARCtangent-A5, ARC 600, ARC 700, Energy Pro EP20 and EP30 cores are supported
Order Codes
 
Product Order Code
Opella-XD for ARC Debug Probe.  Supplied with TPAOP-ARC20 Opella-XD-ARC
Opella-XD for ARC Software.  Software drivers for MetaWare and GNU GDB Debuggers ARC-Software
20-way cJTAG/JTAG Debug cable for direct connection to the ARC core in the user's target. TPAOP-ARC20
15-way JTAG Debug adapter, used with TPAOP-ARC20 to connect to ARC's ARCangel prototyping system. AD-ARC-D15